1. Field of the Invention
The present invention relates to a transconductance-adjusting circuit for controlling frequency characteristics of a primary resistor-capacitor (RC) filter.
2. Description of the Related Art
In known optical disk units, waveforms of analog signals output from optical pickups are adjusted by equalizing with high-pass filters and low-pass filters, and the analog signals are then converted to digital signals. This process uses a known circuit, for example, shown in FIG. 5 as a filter.
Referring to FIG. 5, a primary RC filter 50 which is also referred to as merely a filter hereinafter includes an input differential pair composed of N-channel transistors N1 and N2, and a bias source composed of N-channel transistors N3 and N4. The source terminals of the transistors N1 and N2 connect to a capacitor C1 and function as differential outputs. Thus, a primary low-pass RC filter has impedance, i.e., the inverse number of transconductance gm, of the source terminals and the capacitance of the capacitor C1.
N-channel transistors N5 and N6 having the same channel width and length which are referred to as W/L hereinafter as the transistors N1 and N2 are connected to the drain terminals of the transistors N1 and N2 as loads, respectively. In each of the transistors N5 and N6, the gate shorts to the drain terminal. The loads, i.e., the drain terminals of the transistors N1 and N2 function as differential outputs. Thus, a primary high-pass RC filter is formed.
In the filter 50 having such a structure, when drain currents in the transistors N3 and N4 are unstable, the transconductance gm is also unstable. Thus, the impedances of the source terminals of the transistors N1 and N2 are unstable, and frequency characteristics of the filter 50 are also unstable. Accordingly, it is significantly important to stabilize the drain currents in the transistors N3 and N4. Cut-off frequencies in the filter 50 can be changed by changing the transconductance gm through control of the drain currents in the transistors N3 and N4.
As described above, the filter 50 can be used as both the high-pass filter and the low-pass filter, and can change the cut-off frequencies through control of the drain currents in the transistors N3 and N4. When playback speed is changed, frequency characteristics of a waveform shaping circuit must be changed according to the playback speed. This control can be achieved by changing the drain currents in the transistors N3 and N4. Thus, the filter 50 is suitable for use in the waveform shaping circuit which adjusts shapes of analog signals output from optical pickups.
In the filter 50 shown in FIG. 5, it is very important to retain the transconductance gm at a preset value. The transistors N3 and N4 need to provide a bias to retain the transconductance gm. Thus, the filter 50 is used in combination with the transconductance-adjusting circuit which is referred to as a gm-adjusting circuit. FIG. 6 is a circuit diagram illustrating this case.
Referring to FIG. 6, a gm-adjusting circuit 60 includes P-channel transistors P1 to P4, N-channel transistors N7, N9, and N10, an N-channel transistor group N8, and source resistors R1 of the transistor group N8. Individual transistors having the same W/L in the transistor group N8 are connected to each other in parallel. A pair of the transistor N7 and the transistor group N8, and a pair of the transistors P1 and P2 respectively form current mirrors.
The transistor N9 having the same W/L as the transistor N7 is cascade-connected to the drain of the transistor N7, and the transistor N10 having the same W/L as the transistor group N8 is cascade-connected to the drain of the transistor group N8. Thus, the transistor N7 and the transistor group N8 have the same drain electric potential. Similarly, the transistor P3 having the same W/L as the transistor P1 is cascade-connected to the source of the transistor P1, and the transistor P4 having the same W/L as the transistor P2 is cascade-connected to the source of the transistor P2. Thus, the transistors P1 and P2 have the same drain electric potential.
The transistors N7, P1, P2, and each transistor of the transistor group N8 have the same W/L. The transistor group NB including multiple transistors connected to each other in parallel have K times W/L of one transistor.
Assuming the drain currents in the transistors N10 and P4 are Iout, the same current Iout runs through the drain terminals of the transistors N9 and P3 by the current mirror effect of the transistors P1 and P2 and the current mirror effect of the transistors P3 and P4. The current Iout is represented by equation (1).
                    Iout        =                                            2                                                μ                  n                                ⁢                                  Cox                  ⁡                                      (                                          W                      /                      L                                        )                                                                        ·                          1                              R                1                2                                              ⁢                                    (                              1                -                                  1                                      K                                                              )                        2                                              (        1        )            where μn is the mobility of an N-channel transistor and Cox is the gate capacitance per unit area. The transconductance gm1 in the transistor N7 is represented by equation (2).
                              gm          ⁢                                          ⁢          1                =                              2            ⁢                          μ              n                        ⁢                          Cox              ⁡                              (                                  W                  L                                )                                      ⁢            Iout                                              (        2        )            
Equation (3) is obtained by substituting the right-hand side of equation (1) for Iout in equation (2).
                              gm          ⁢                                          ⁢          1                =                              2                          R              1                                ⁢                      (                          1              -                              1                                  K                                                      )                                              (        3        )            
Equation (3) shows that the transconductance gm1 of the transistor N7 has no relationship with a supply voltage VDD and is insensitive to a change in the supply voltage. Equation (3) also shows that the transconductance gm1 is insensitive to circuit temperature when the resistor R1 is disposed at the outside of the circuit.
When the gate terminal of the transistor N7 having the transconductance gm1 given by equation (3) in the gm-adjusting circuit 60 of the filter 50 shown in FIG. 6 is connected to the gate terminals of the transistors N3 and N4 which are the bias source of the filter 50 and when the transistor N7 has the same W/L as the transistors N3 and N4, the transistors N3 and N4 have the same transconductance gm1. That is, the transistors N3, N4, and N7 are in a current mirror relationship, and thus the output currents, i.e., drain currents in the transistors N3 and N4 are the same as the current Iout given by equation (1).
When the transistor N7 has the same W/L as the transistors N1 and N2, the source terminals of which have the impedance, i.e., 1/gm and function as the output terminals of the low-pass filter of the filter 50 and the transistors N5 and N6 which function as the output terminals of the high-pass filter, the transistors N1, N2, N5, and N6 have the same transconductance gm1 given by equation (3). Thus, each source terminal has a constant impedance, and stable frequency characteristics insensitive to a change in the supply voltage and the atmospheric temperature are achieved.
In many applications of the primary RC filter 50, the frequency characteristics are always controlled. Thus, functions which can control the frequency characteristics of the filter 50 are required. In the circuit shown in FIG. 6, arrangements which realize such functions may be as follows: (a) In equation (3), the resistance R1 and the number K of transistors connected to each other in parallel in the transistor group N8 may be variable. (b) In the filter 50, a plurality of transistors may be arranged in parallel, instead of each transistor.
In the case that the resistance R1 is variable, the resistor R1 is generally disposed at the outside of the circuit and must have an additional function to change the resistance R1, so that controlling functions and components on a board increase. Thus, in consideration with production costs of the board, the resistance R1 is preferably a fixed value. Referring to FIG. 7, the case that the number K of transistors connected to each other in parallel in the transistor group 8 is changed will now be described.
In FIG. 7, the frequencies are generally changed by logic commands, and the number of bits required for control is determined according to the variable range of the frequencies and the number of phases in this range. In this arrangement, the transistor group N8 including K transistors 7 is needed to be connected through switches SW to a transistor group N11 including K transistors 7, a transistor group N12 including 2K transistors 7, a transistor group N13 including 4K transistors 7, etc. as shown in FIG. 7. Consequently, 64K transistors 7 are connected to each other in parallel to enable 6-bit control. Required cut-off frequencies can be set by changing the bias currents in the transistors N3 and N4 of the filter 50, the bias currents being changed by turning on/off the switches SW and changing the W/L of the transistor groups N8, and N11 to N16.
FIG. 8 is a circuit diagram illustrating another instance of known gm-adjusting circuits. This gm-adjusting circuit provides a constant transconductance gm. As is disclosed in pages 4 to 5 and FIG. 10 of Japanese Unexamined Patent Application Publication No. 2001-308683, a gm-adjusting circuit 62 of this instance includes a voltage-to-current (VI) converting amplifier 622, which is also referred to as a gm amplifier, having a variable transconductance gm, a general VI converting amplifier 624, a capacitor Cext and a resistor Rext which are connected to nodes connecting the VI converting amplifier 622 to the VI converting amplifier 624. An output Icnt of the VI converting amplifier 624 is fed back to the VI converting amplifier 622 having a variable transconductance gm.
When a direct-current (DC) voltage Va1 is applied between inputs of the VI converting amplifier 622, the VI converting amplifier 622 outputs a current gm0·Va1. The output current gm0·Va1 is converted to a voltage through the resistor Rext. The voltage gm0·Va1·Rext and a DC voltage Va2 are input to the VI converting amplifier 624, and a current Icnt corresponding to a potential difference between these two voltages is output. The current Icnt is then fed back to the VI converting amplifier 622, and the transconductance gm0 is changed so that gm0·Va1·Rext equals Va2. The transconductance gm0 of the gm amplifier is represented by equation (4).
                              gm          0                =                              1            Rext                    ×                                    V              a2                                      V              a1                                                          (        4        )            
When Va1 has the same voltage dependency as Va2, the ratio of Va2 to Va1 is constant, insensitive to a change in supply voltage. A constant transconductance gm0 is thereby achieved. Thus, when the filter 50 is provided with such a transconductance gm0, stable frequency characteristics are achieved. According to equation (4), cut-off frequencies are controlled by changing the voltage Va1 or the voltage Va2.
In the known gm-adjusting circuit 60 shown in FIG. 6, the number of the transistor 7 increases. This causes the following disadvantages: the area occupied by chips is increased; and the required transconductance gm is not achieved and precision in changing the frequencies is lowered due to the increased relative offset between the transistors.
The gm-adjusting circuit 62 shown in FIG. 8 changes the cut-off frequencies only by changing the voltage value while the gm-adjusting circuit 60 changes the cut-off frequencies by changing the number of transistors. Thus, a disadvantage caused by the increased number of transistors is avoided, and an advantage is achieved in that the variable range can be expanded by two parameters in a reasonable way.
When the frequency characteristics of the filter 50 shown in FIG. 5 are controlled by the gm-adjusting circuit 62, the filter 50 can have stable frequency characteristics and can control the cut-off frequencies if the transconductance of the transistors N1 and N2 being the input differential pair in the filter 50 agrees with the transconductance of the VI converting amplifier 622. However, the transconductance of the transistors N3 and N4 which are the bias source for the transistors N1 and N2, respectively, is controlled by the voltage applied to the gates of these transistors. Thus, the current Icnt output from the gm-adjusting circuit 62 cannot be used for controlling the transconductance of the filter 50.